Marino F. Arturo, Sathish Mudabagila-Gowda, Ariel Meyuhas
MAX I.E.G. LLC – 432 Homans Ave Closter NJ 07624,
Marino_Arturo@maxieg.com, Sathish_MG@maxieg.com, Ariel_Meyuhas@maxieg.com
Keywords: Throughput Time (TPT)
The toughest challenge compound semiconductor fabs face during the current ramp cycle is increasing equipment throughput (TPT) faster. Determining the opportunities to increase equipment TPT through machine rate modeling is the necessary first step in this improvement process; therefore, an optimized modeling technique is imperative to meet this challenge. As this case study was completed it identified the opportunities for increasing TPT and yielded a 40% increase through the implementation of proper batching, eliminating or cascading non-value-added activities performed by the operator (approx. 100sec per wafer) and configuring the stepper to load multiple reticle pods at once. As tools are becoming more and more sophisticated and complex it is imperative to create and maintain a machine modeling infrastructure detailed enough to use as catalyst for TPT improvement. At the same time, it has to be simple and cost effective to maintain. This is what MAX I.E.G. has realized time again!